#ifndef DRV_PWM_H__
#define DRV_PWM_H__

#include <firmament.h>

/* Config PWM */
#define BOARD_CFG_PWM1
#define BOARD_CFG_PWM2
#define BOARD_CFG_PWM3
#define BOARD_CFG_PWM4
#define BOARD_CFG_PWM5

/*
 * as for parameter output io X
 * value 0xff means close corresponding output io
 */

#if defined(BOARD_CFG_PWM1)
#ifndef PMW1_CONFIG
#define PMW1_CONFIG                     \
{                                       \
    .channel_regbase = EPWM1_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM1, \
    .output_ioA = 0,                    \
    .output_ioB = 1,                    \
    .name = "PWM1",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM2)
#ifndef PMW2_CONFIG
#define PMW2_CONFIG                     \
{                                       \
    .channel_regbase = EPWM2_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM2, \
    .output_ioA = 2,                    \
    .output_ioB = 3,                    \
    .name = "PWM2",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM3)
#ifndef PMW3_CONFIG
#define PMW3_CONFIG                     \
{                                       \
    .channel_regbase = EPWM3_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM3, \
    .output_ioA = 4,                    \
    .output_ioB = 5,                    \
    .name = "PWM3",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM4)
#ifndef PMW4_CONFIG
#define PMW4_CONFIG                     \
{                                       \
    .channel_regbase = EPWM4_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM4, \
    .output_ioA = 6,                    \
    .output_ioB = 7,                    \
    .name = "PWM4",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM5)
#ifndef PMW5_CONFIG
#define PMW5_CONFIG                     \
{                                       \
    .channel_regbase = EPWM5_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM5, \
    .output_ioA = 8,                    \
    .output_ioB = 9,                    \
    .name = "PWM5",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM6)
#ifndef PMW6_CONFIG
#define PMW6_CONFIG                     \
{                                       \
    .channel_regbase = EPWM6_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM6, \
    .output_ioA = 0,                    \
    .output_ioB = 0,                    \
    .name = "PWM6",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM7)
#ifndef PMW7_CONFIG
#define PMW7_CONFIG                     \
{                                       \
    .channel_regbase = EPWM7_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM7, \
    .output_ioA = 0,                    \
    .output_ioB = 0,                    \
    .name = "PWM7",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM8)
#ifndef PMW8_CONFIG
#define PMW8_CONFIG                     \
{                                       \
    .channel_regbase = EPWM8_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM8, \
    .output_ioA = 0,                    \
    .output_ioB = 0,                    \
    .name = "PWM8",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM9)
#ifndef PMW9_CONFIG
#define PMW9_CONFIG                     \
{                                       \
    .channel_regbase = EPWM9_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM9, \
    .output_ioA = 0,                    \
    .output_ioB = 0,                    \
    .name = "PWM9",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM10)
#ifndef PMW10_CONFIG
#define PMW10_CONFIG                     \
{                                        \
    .channel_regbase = EPWM10_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM10, \
    .output_ioA = 0,                     \
    .output_ioB = 0,                     \
    .name = "PWM10",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM11)
#ifndef PMW11_CONFIG
#define PMW11_CONFIG                     \
{                                        \
    .channel_regbase = EPWM11_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM11, \
    .output_ioA = 0,                     \
    .output_ioB = 0,                     \
    .name = "PWM11",                     \
}
#endif
#endif

#if defined(BOARD_CFG_PWM12)
#ifndef PMW12_CONFIG
#define PMW12_CONFIG                     \
{                                        \
    .channel_regbase = EPWM12_BASE,      \
    .clk_source = SYSCTL_PERIPH_CLK_EPWM12, \
    .output_ioA = 0,                     \
    .output_ioB = 0,                     \
    .name = "PWM12",                     \
}
#endif
#endif

/*--------------------------------------------------*/
struct qx_pwm {
    rt_uint32_t channel_regbase;
    rt_uint32_t clk_source;
    rt_uint32_t output_ioA;
    rt_uint32_t output_ioB;
    char *name;
};

rt_err_t drv_pwm_init(void);

#endif
